org 00h
dig_ctrl4 equ p1.0
dig_ctrl3 equ p1.1
dig_ctrl2 equ p1.2
dig_ctrl1 equ p1.3
mov dptr,#200h
mov r0,#00d
ljmp main
org 000Bh
mov tl0,#36h
mov th0,#0f6h
mov p2,#0ffh
clr dig_ctrl1
clr dig_ctrl2
clr dig_ctrl3
clr dig_ctrl4
inc r0
mov a,r0
mov b,#4
div ab
mov r0,b
cjne r0,#00,b1 ;check for remainder
mov dptr,#200h
mov a,r1
movc a,@a+dptr
mov p2,a
setb dig_ctrl1
sjmp last
b1: cjne r0,#01,b2
mov dptr,#200h
mov a,r2
movc a,@a+dptr
mov p2,a
setb dig_ctrl2
sjmp last
b2: cjne r0,#02,b3
mov dptr,#200h
mov a,r3
movc a,@a+dptr
mov p2,a
setb dig_ctrl3
sjmp last
b3: cjne r0,#03,last
mov dptr,#200h
mov a,r4
movc a,@a+dptr
mov p2,a
setb dig_ctrl4
last:
reti
main: mov tmod,#11h
mov tl0,#36h
mov th0,#0f6h
mov ie,#82h
setb tr0
again: mov r4,#00
l4: mov r3,#00
l3: mov r2,#00
l2: mov r1,#00
l1: acall delay
inc r1
cjne r1,#10,l1
inc r2
cjne r2,#10,l2
inc r3
cjne r3,#10,l3
inc r4
cjne r4,#10,l4
sjmp again
delay: mov r5,#20 ;initialize counter for delay
rpt: mov tl1,#0fdh ;initialising timer for delay
mov th1,#4bh
setb tr1
here: jnb tf1,here
clr tr1
clr tf1
djnz r5,rpt
ret
org 200h
db 40h,0f9h,24h,30h,19h,12h,02h,0f8h,00h,10h
end
If you are facing any problem in this program or any kind of doubt then comment please
need circuit diagram for interfacing
ReplyDeleteneed circuit diagram for above one
ReplyDeleteneed a big dick
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