org 00h
dig_ctrl4 equ p1.3 ;declare the control pins of seven segment
dig_ctrl3 equ p1.2
dig_ctrl2 equ p1.1
dig_ctrl1 equ p1.0
mov r3,#00h ;for case selection
mov r0,#00h ;status of visitor
ljmp main
org 000bh
mov tl0,#36h
mov th0,#0f6h
mov p2,#0ffh
clr dig_ctrl4
clr dig_ctrl3
clr dig_ctrl2
clr dig_ctrl1
inc r3
mov a,r3
mov b,#4
div ab
mov r3,b
cjne r3,#00,b1
mov dptr,#200h
mov a,r5
movc a,@a+dptr
mov p2,a
setb dig_ctrl1
sjmp last
b1: cjne r3,#01,b2
mov dptr,#200h
mov a,r4
movc a,@a+dptr
mov p2,a
setb dig_ctrl2
sjmp last
b2: cjne r3,#02,b3
mov dptr,#200h
mov a,r2
movc a,@a+dptr
mov p2,a
setb dig_ctrl3
sjmp last
b3: cjne r3,#03,last
mov dptr,#200h
mov a,r1
movc a,@a+dptr
mov p2,a
setb dig_ctrl4
last:
reti
main: setb p3.5
setb p3.6
clr dig_ctrl4
clr dig_ctrl3
clr dig_ctrl2
clr dig_ctrl1
mov tmod,#01h ;timer 0 and mode 1
mov tl0,#0f6h
mov th0,#0ffh
mov ie,#82h
setb tr0
check: mov r6,#0aah
abc2: acall delay
djnz r6,abc2
jnb p3.5,up
mov r6,#0aah
abc3: acall delay
djnz r6,abc3
jnb p3.6,down
sjmp check
up: mov r6,#0aah
abc4: acall delay
djnz r6,abc4
jb p3.6,up
acall delay
bcd:jnb p3.6,bcd
inc r0
mov a,r0
mov b,#10
div ab
mov r1,b
mov b,#10
div ab
mov r2,b
mov b,#10
div ab
mov r4,b
mov r5,a
cjne r0,#255,go
mov r0,#00h
go: sjmp check
down: mov r6,#0aah
abc5: acall delay
djnz r6,abc5
jb p3.5,down
acall delay
bcd2: jnb p3.5,bcd2
dec r0
mov a,r0
mov b,#10
div ab
mov r1,b
mov b,#10
div ab
mov r2,b
mov b,#10
div ab
mov r4,b
mov r5,a
cjne r0,#00,go1
mov r0,#255
go1: sjmp check
delay: mov tmod,#01h
mov tl0,#36h
mov th0,#0f6h
setb tr0
abc: jnb tf0,abc
clr tr0
clr tf0
ret
org 200h
DB 40h,0f9h,24h,30h,19h,12h,02h,0f8h,00h,10h
end
please provide circuit diagram for this particular code
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